The present invention relates to a multiple chamber silicon wafer VLSI processing system that includes a common load lock and wafer exchange robot and multiple process chambers suitable for sequentially and simultaneously performing different process steps such as deposition and/or dry etching of dielectric, semiconductor and conductor layers. The invention also relates to apparatus for performing multiple integrated processing steps in a continuous sequence, that is, by routing semiconductor wafers between different processing chambers while the system is closed and under vacuum.
Presently, the typical available VLSI processing reactor systems are single chamber batch-type systems in which the chamber is dedicated to a single type of process such as plasma etching or chemical vapor deposition. These process-dedicated batch-type reactor chambers are designed to provide a high processing throughput for a single process step such as, for example, the chemical vapor deposition of silicon or silicon dioxide or other dielectric or the etching of such layers.
To our knowledge, there are available very few systems that are capable of performing more than one process step in-situ. One of the few exceptions is the magnetron-enhanced gas chemistry plasma reactor described in allowed, co-pending, commonly assigned U.S. patent application Ser. No. 814,638, entitled "Magnetron-Enhanced Plasma Etching Process", filed Dec. 30, 1985, in the name of Maydan et al. The magnetron RIE mode plasma etch reactor described in the Maydan et al application is a modification of the plasma system disclosed in allowed, co-pending, commonly assigned U.S. patent application Ser. No. 664,657, entitled "Apparatus and Method for Magnetron-Enhanced Plasma-Assisted Chemical Vapor Deposition", filed Oct. 25, 1984, in the name of Foster et al. In particular, the Foster et al patent application discloses the in-situ, sequential or simultaneous deposition and etching of layers on a semiconductor wafer. The Maydan and Foster applications are hereby incorporated by reference.
Secondly, single chamber etcher systems are available having an associated vacuum load lock that is used for pre- or post-processing.
Thirdly, an article in the October, 1985 issue of Semiconductor International magazine, entitled "Dry Etching Systems: Gearing up for Larger Wafers", pp. 48-60, schematically portrays a four-chamber dry etching system that uses a common load lock to transfer wafers to the individual etch chambers.